1. Technical Field
The present invention relates to a heat dissipating substrate and a method of manufacturing the same.
2. Description of the Related Art
As electronic components have been becoming miniaturized, densified and thinned, thinned and highly-functionalized semiconductor package substrates are being required.
Particularly, in order to realize a multi-chip package (MCP) technology for stacking and mounting several semiconductor chips on one substrate or a package on package (PoP) technology for stacking several substrates mounted with a semiconductor chip, it is required to develop a substrate exhibiting a thermal expansion behavior similar to that of a semiconductor and having excellent bendability. Further, as the operation speed of a semiconductor chip increases due to advances in semiconductor chips, it is also required to solve the problem of heat generation.
In order to meet the above requirements, technologies for manufacturing a metal core substrate by inserting metal into a core are being used. The reason for this is that metal serves to block the thermal expansion behavior of a substrate and promote heat dissipation because it has very excellent thermal expansion characteristics and high thermal conductivity.
FIGS. 1 to 5 are sectional views showing a conventional method of manufacturing such a metal core substrate. The conventional method of manufacturing a metal core substrate is described as follows with reference to FIGS. 1 to 5.
First, as shown in FIG. 1, a metal core 11 having high thermal conductivity is provided.
Subsequently, as shown in FIG. 2, through-holes 12 are formed in the metal core 11 by drilling work using a CNC drill or a CO2/YAG laser or by etching work.
Subsequently, as shown in FIG. 3, an insulation layer 13 is formed on both sides of the metal core 11 provided with the through-holes 12.
Subsequently, as shown in FIG. 4, viaholes 14 for making interlayer connections are formed by machining the insulation layer 13 corresponding to the through-holes 12 formed in the metal core 11. In this case, the viaholes 14 must have smaller sizes than the through-holes 12 formed in the metal core 11 in order to insulate copper plating layers formed on the inner walls of the viaholes 14 from the metal core 11.
Finally, as shown in FIG. 5, copper plating layers are formed on the surface of the insulation layer 13 and the inner walls of the viaholes 14 by electroless and electrolytic copper plating processes and an electrolytic plating process, and then the copper plating layers are formed into circuit layers by exposure, development and etching processes to manufacture a metal core substrate 10.
However, such a conventional method of manufacturing a metal core substrate is problematic as follows.
First, in order to prevent the electrical defect of the metal core substrate 10 due to the short of the plating layers formed on the surface of the insulation layer 13 and the inner walls of the viaholes 14 formed in the metal core 11, the through-holes 12 must be formed to have a sufficient size. In this case, the residual ratio of the metal core to the substrate is at most about 50%, thus reducing thermal conductivity. Further, in order to perform drilling work such that the sizes of the viaholes 14 are smaller than those of the through-holes 12, working accuracy is required, thus increasing manufacturing cost and time.
Furthermore, the metal core 11 is embedded in the insulation layer 13 in order to increase the rate of heat radiation, so that the thickness of the substrate is increased, with the result that, at the time of performing drilling work, a drill bit is easily worn compared to other substrates having the same structure, and working accuracy is also decreased.